As an electrically-writable/erasable non-volatile semiconductor storage device, an EEPROM (Electrically Erasable and Programmable Read Only Memory) has been widely used. Each of these storage devices represented by a flash memory that has been currently widely used has a conductive floating gate electrode or trap insulating film surrounded by an oxide film below a gate electrode of a MISFET, takes a charge storage state in the floating gate or the trap insulating film as storage information, and reads the storage information as a threshold of a transistor. This trap insulating film means a charge-storable insulating film, and a silicon nitride film or others is cited as one example. The threshold of the MISFET is shifted by injection and discharge of electric charges to and from such a charge storage region so that the MISFET is operated as a storage element. As this flash memory, a split-gate MONOS (Metal-Oxide-Nitride-Oxide Semiconductor) memory is cited.
When a plurality of memory cells are arranged on a semiconductor substrate and when different voltages are applied to electrodes of the respective memory cells, it is known that memory cells adjacent to each other are separated by an element isolation region formed of an insulating film buried in a trench in a main surface of a semiconductor substrate, and known that a contact plug penetrating through an interlayer insulating film on the semiconductor substrate is connected to a drain region of each memory cell.
For example, Patent Document 1 (Japanese Patent Application Laid-open Publication No. 2007-35728) describes that heights of an upper surface of the element isolation positioned between sidewall spacers adjacent to each other and an upper surface of other region of the element isolation are substantially equal to each other.